Three-Dimensional Mapping of Semiconductor Devices
The measurement of temperature is ubiquitous in science, engineering, and medicine. Most often, temperature is measured at a single point in space that is accessible to a thermometer. Thermometry at higher dimensions—e.g., a two-dimensional imaging of temperature across a surface or a three-dimensional mapping of temperature throughout a volume of material—is needed to support technologies as varied as construction engineering, thermally-driven medical therapies, and information technology. An important trend in the design of computing systems is vertical stacking of integrated circuits to reduce power, decrease footprint, and increase performance. In a three-dimensional device architecture, however, the management of heat becomes a limiting factor and there is currently no method available to measure the temperature distribution within a vertical stack of integrated circuits.
Professor Cahill will study the physical principles and practical implementation of synchrotron-based x-ray scattering and nuclear magnetic resonance methods for mapping the three-dimensional temperature distribution within stacked semiconductor wafers during operation. In addition to these application to information technology, advances in three-dimensional thermometry could broadly impact the development of more efficient and reliable technologies for energy storage, power controls, lighting, and electric vehicles.